Low Power Memory/Memristor Devices and Systems
| dc.contributor.editor | Serb, Alex | |
| dc.contributor.editor | Mehonic, Adnan | |
| dc.date.accessioned | 2023-02-02T16:28:21Z | |
| dc.date.available | 2023-02-02T16:28:21Z | |
| dc.date.issued | 2023 | |
| dc.identifier | ONIX_20230202_9783036561851_36 | |
| dc.identifier.uri | https://directory.doabooks.org/handle/20.500.12854/96635 | |
| dc.description.abstract | This reprint focusses on achieving low-power computation using memristive devices. The topic was designed as a convenient reference point: it contains a mix of techniques starting from the fundamental manufacturing of memristive devices all the way to applications such as physically unclonable functions, and also covers perspectives on, e.g., in-memory computing, which is inextricably linked with emerging memory devices such as memristors. Finally, the reprint contains a few articles representing how other communities (from typical CMOS design to photonics) are fighting on their own fronts in the quest towards low-power computation, as a comparison with the memristor literature. We hope that readers will enjoy discovering the articles within. | |
| dc.language | English | |
| dc.subject.classification | thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues | en_US |
| dc.subject.classification | thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues::TBX History of engineering and technology | en_US |
| dc.subject.other | Logic-in-Memory (LiM) | |
| dc.subject.other | Von Neumann’s bottleneck | |
| dc.subject.other | memory-wall | |
| dc.subject.other | memristor | |
| dc.subject.other | memristive logic | |
| dc.subject.other | Non-Volatile Memory (NVM) | |
| dc.subject.other | Resistive RAM | |
| dc.subject.other | in-memory computing | |
| dc.subject.other | majority logic | |
| dc.subject.other | adder | |
| dc.subject.other | Boolean logic | |
| dc.subject.other | parallel-prefix adder | |
| dc.subject.other | floating-gate transistor | |
| dc.subject.other | nonvolatile memory | |
| dc.subject.other | continuous-time programming | |
| dc.subject.other | floating-gate memory array | |
| dc.subject.other | FPAA | |
| dc.subject.other | reconfigurable | |
| dc.subject.other | MRAM | |
| dc.subject.other | TRNG | |
| dc.subject.other | PUF | |
| dc.subject.other | morphable security primitive | |
| dc.subject.other | hardware security primitive | |
| dc.subject.other | RRAM | |
| dc.subject.other | resistive-switching | |
| dc.subject.other | cross-point | |
| dc.subject.other | memory | |
| dc.subject.other | neuromorphic | |
| dc.subject.other | pattern recognition | |
| dc.subject.other | multilayer perceptron | |
| dc.subject.other | BNN | |
| dc.subject.other | logic-in-memory | |
| dc.subject.other | SIMPLY | |
| dc.subject.other | physical design | |
| dc.subject.other | power grid | |
| dc.subject.other | power-gating | |
| dc.subject.other | SRPG | |
| dc.subject.other | selective SRPG | |
| dc.subject.other | floorplanning | |
| dc.subject.other | place and route | |
| dc.subject.other | resistive RAM (ReRAM) | |
| dc.subject.other | non-volatile memory (NVM) | |
| dc.subject.other | 1Transistor-1Resistor (1T–1R) | |
| dc.subject.other | processing-in-memory | |
| dc.subject.other | silicon oxide | |
| dc.subject.other | silicon nitride | |
| dc.subject.other | SOI technology | |
| dc.subject.other | resistive switching | |
| dc.subject.other | electrical characteristics | |
| dc.subject.other | laser treatment | |
| dc.subject.other | thermal treatment | |
| dc.subject.other | energy modeling | |
| dc.subject.other | non-von neumann | |
| dc.subject.other | instruction set | |
| dc.subject.other | compilation | |
| dc.subject.other | stencils | |
| dc.subject.other | convolutions | |
| dc.subject.other | sram | |
| dc.subject.other | energy wall | |
| dc.subject.other | memory wall | |
| dc.subject.other | low-bandwidth TIA | |
| dc.subject.other | equalizer | |
| dc.subject.other | multi-stage main amplifier | |
| dc.subject.other | amplitude response | |
| dc.subject.other | group delay variation | |
| dc.subject.other | graph coloring | |
| dc.subject.other | cellular nonlinear networks | |
| dc.subject.other | memristor oscillatory networks | |
| dc.subject.other | locally-active memristors | |
| dc.subject.other | control theory | |
| dc.title | Low Power Memory/Memristor Devices and Systems | |
| dc.type | book | |
| oapen.identifier.doi | 10.3390/books978-3-0365-6186-8 | |
| oapen.relation.isPublishedBy | 46cabcaa-dd94-4bfe-87b4-55023c1b36d0 | |
| oapen.relation.isbn | 9783036561851 | |
| oapen.relation.isbn | 9783036561868 | |
| oapen.pages | 250 | |
| oapen.place.publication | Basel |
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